Changed hardware configuration. ATmega not supplies CLKO-clock to ATtiny, freeing...

diff --git a/Makefile b/Makefile
index 345a872467551fccc4398c74730cc4ab5277e275..ad0e9414d5c1d7f1b5c34e7ca57dd231fe1568f4 100755 (executable)
--- a/Makefile
+++ b/Makefile
@@ -44,7 +44,7 @@ MCU = atmega328p
 # Fancy 20MHz settings:
 F_CPU = 20000000
 ## Fuse-bits. Recommended tool: http://www.engbedded.com/fusecalc/
-FUSE_LOW  = 0xEF
+FUSE_LOW  = 0xAF
 FUSE_HIGH = 0xD9
 FUSE_EXT  = 0x7
 

diff --git a/fbosd.c b/fbosd.c
index 8299540af749acda36724270487026b52052b1d4..fb7ec8332f1104324aeb32f675afe696a07b55b6 100644 (file)
--- a/fbosd.c
+++ b/fbosd.c
@@ -44,7 +44,7 @@ void blank_lines ( void )
 {
        if ( line < FIRST_LINE )
        {
-               PORTB ^= 0x001;
+               PORTB ^= 0x004;
                return;
        }
        line_handler = active_lines;
@@ -79,8 +79,10 @@ ISR (INT0_vect)
 int main(void)
 {
        
+       // Note: PB0 is used as CLKO outputting 20MHz clock to ATtiny
+
        // Using some pins on PORTB for debug-indicator-LEDs
-       DDRB = (1<< PB0)|(1 << PB1)|(1 << PB2);
+       DDRB = (1 << PB1)|(1 << PB2);
        PORTB = 0x0;
 
        // Using pin 7 on PD to clock out pixels \o/

diff --git a/syncgen/Makefile b/syncgen/Makefile
index e68a3273029bbf66fde59c11d3364cbdab2b0a39..306bb7040711d86be5fa4467c1487a9fc22e0e85 100644 (file)
--- a/syncgen/Makefile
+++ b/syncgen/Makefile
@@ -36,7 +36,7 @@ MCU = attiny85
 F_CPU = 20000000
 
 # Fuse-bits. Recommended tool: http://www.engbedded.com/fusecalc/
-FUSE_LOW  = 0xCF
+FUSE_LOW  = 0xE0
 FUSE_HIGH = 0xDF
 FUSE_EXT  = 0xFF
 # Have had problems with efuse suggested by fusecalc, must check :P