From: Jon Langseth <jon.langseth@lilug.no>
Date: Sat, 21 Jul 2012 14:49:39 +0000 (+0200)
Subject: Changed hardware configuration. ATmega not supplies CLKO-clock to ATtiny, freeing... 
X-Git-Url: https://git.defcon.no/?p=avrfbosd;a=commitdiff_plain;h=7c9340c66e22efd5e865fec7cd6aa03221328907

Changed hardware configuration. ATmega not supplies CLKO-clock to ATtiny, freeing up one ATtiny pin.
---

diff --git a/Makefile b/Makefile
index 345a872..ad0e941 100755
--- a/Makefile
+++ b/Makefile
@@ -44,7 +44,7 @@ MCU = atmega328p
 # Fancy 20MHz settings:
 F_CPU = 20000000
 ## Fuse-bits. Recommended tool: http://www.engbedded.com/fusecalc/
-FUSE_LOW  = 0xEF
+FUSE_LOW  = 0xAF
 FUSE_HIGH = 0xD9
 FUSE_EXT  = 0x7
 
diff --git a/fbosd.c b/fbosd.c
index 8299540..fb7ec83 100644
--- a/fbosd.c
+++ b/fbosd.c
@@ -44,7 +44,7 @@ void blank_lines ( void )
 {
 	if ( line < FIRST_LINE )
 	{
-		PORTB ^= 0x001;
+		PORTB ^= 0x004;
 		return;
 	}
 	line_handler = active_lines;
@@ -79,8 +79,10 @@ ISR (INT0_vect)
 int main(void)
 {
 	
+	// Note: PB0 is used as CLKO outputting 20MHz clock to ATtiny
+
 	// Using some pins on PORTB for debug-indicator-LEDs
-	DDRB = (1<< PB0)|(1 << PB1)|(1 << PB2);
+	DDRB = (1 << PB1)|(1 << PB2);
 	PORTB = 0x0;
 
 	// Using pin 7 on PD to clock out pixels \o/
diff --git a/syncgen/Makefile b/syncgen/Makefile
index e68a327..306bb70 100644
--- a/syncgen/Makefile
+++ b/syncgen/Makefile
@@ -36,7 +36,7 @@ MCU = attiny85
 F_CPU = 20000000
 
 # Fuse-bits. Recommended tool: http://www.engbedded.com/fusecalc/
-FUSE_LOW  = 0xCF
+FUSE_LOW  = 0xE0
 FUSE_HIGH = 0xDF
 FUSE_EXT  = 0xFF
 # Have had problems with efuse suggested by fusecalc, must check :P