--- /dev/null
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <util/delay.h>
+#define ZERO PORTB=0b000
+#define BLACK PORTB=0b001
+
+// -----..----- ^
+// | | |
+// -| RST VCC |-`
+// | |
+// .--| X1 PB2 |-
+// [ ] | | 470R
+// '--| X2 PB1 |--^v^v-.
+// | | |----> VidOut
+// .--| GND PB0 |--^v^v-'
+// | | | 1kR
+//----- ------------
+/*
+uint8_t testimg_data[] =
+{
+ 0b11111100, 0b00000000, 0b00000011, 0b10000000, 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b10000000, 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b10000000, 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b10000000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b11000000, 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b11000000, 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b11000000, 0b00000000, 0b00000000,
+ 0b11111100, 0b00000000, 0b00000011, 0b11000000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00110000, 0b00000000, 0b00000011, 0b01100000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00110010, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00110010, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00110010, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00110010, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00110100, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00110100, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00110100, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00110100, 0b11001101, 0b10011011, 0b01101111, 0b00110000, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b01101100,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b01101100,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b01101100,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b01101100,
+ 0b01101100, 0b01101100,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b10010010,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b10010010,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b10010010,
+ 0b00110000, 0b11101100, 0b11110011, 0b11011001, 0b10110000, 0b10010010,
+ 0b10010010, 0b10010010,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b10000010,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b10000010,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b10000010,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b10000010,
+ 0b10000010, 0b10000010,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b01000100,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b01000100,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b01000100,
+ 0b00110110, 0b11111100, 0b01100011, 0b00011111, 0b10110000, 0b01000100,
+ 0b01000100, 0b01000100,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00101000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00101000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00101000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00101000,
+ 0b00101000, 0b00101000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00010000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00010000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00010000,
+ 0b00110110, 0b11011100, 0b01100011, 0b00011001, 0b10110000, 0b00010000,
+ 0b00010000, 0b00010000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00110110, 0b11001100, 0b01100011, 0b00011001, 0b10111111, 0b00000000,
+ 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000, 0b00000000,
+ 0b00000000, 0b00000000,
+};
+
+#define testimg_height 15
+#define testimg_width 208
+
+#define START1 100
+#define END1 115
+#define START2 412
+#define END2 427
+*/
+
+#include "avrosdlogo.h"
+volatile int rasterline;
+volatile uint16_t line;
+
+volatile uint8_t hres;
+volatile int renderLine;
+int stretch;
+
+void asm_render_line( void ) {
+ __asm__ __volatile__ (
+ ".macro outbit p" "\n\t"
+ "BST __tmp_reg__,7" "\n\t" // Store bit 7 to T
+ "BLD r16,1" "\n\t" // Load bit T into r16 bit number 4
+ "OUT \\p,r16" "\n\t" // Send contents of r16 to %[port]
+ "NOP" "\n\t"
+ ".endm" "\n\t"
+
+ "ADD r26,r28" "\n\t" // Add register Y to register X, low part
+ "ADC r27,r29" "\n\t" // Add high Y to X with carry from low part
+
+ "IN r16,%[port]" "\n\t" // Save port content to register 16
+ "RJMP start_line" "\n\t"
+
+ "loop_byte:" "\n\t" // Notice that in the macro we always use bit 7 and left-shift
+ "BST __tmp_reg__,6" "\n\t" // Here we use bit 6 without left-shift to output bit 0
+ "BLD r16,1" "\n\t" // of each byte (except the last bit on the line)
+ "OUT %[port],r16" "\n\t" // We do not have time for a left-shift, teh "extra cycle" was used for "dec-branch"
+ "NOP" "\n\t"
+
+ "start_line:" "\n\t"
+ "LD __tmp_reg__,X+" "\n\t" // Load from address pointed to by X into temporary register, then increment X-pointer
+
+ "outbit %[port]" "\n\t" // Output bit 7 using Macro
+ "LSL __tmp_reg__" "\n\t" // Left-shift for next bit
+ "outbit %[port]" "\n\t" // Output bit 6 using Macro
+ "LSL __tmp_reg__" "\n\t" // Left-shift for next bit
+ "outbit %[port]" "\n\t" // Output bit 5 using Macro
+ "LSL __tmp_reg__" "\n\t" // Left-shift for next bit
+ "outbit %[port]" "\n\t" // Output bit 4 using Macro
+ "LSL __tmp_reg__" "\n\t" // Left-shift for next bit
+ "outbit %[port]" "\n\t" // Output bit 3 using Macro
+ "LSL __tmp_reg__" "\n\t" // Left-shift for next bit
+ "outbit %[port]" "\n\t" // Output bit 2 using Macro
+ "LSL __tmp_reg__" "\n\t" // Left-shift for next bit
+ "outbit %[port]" "\n\t" // Output bit 1 using Macro
+
+ "DEC %[hres]" "\n\t" // Decrement num-bytes-remaining-in-resolution
+ "BRNE loop_byte" "\n\t" // Branch to loop6 if %[hres] != zero
+
+ "LSL __tmp_reg__" "\n\t" // Left-shift for last bit on the line
+ "outbit %[port]" "\n\t" // Output bit 0 using Macro.
+
+ "CBI %[port],1" "\n\t" // Clear our "display bit" to ensure we end on black
+
+ :
+ : [port] "i" (_SFR_IO_ADDR(PORTB)),
+ "x" (testimg_data),
+ "y" (renderLine),
+ [hres] "d" (hres)
+ );
+}
+
+void hsync(void)
+{
+ line++;
+ ZERO; _delay_us(4); // sync
+ BLACK; _delay_us(8); // Back porch
+}
+
+void vsync(uint8_t odd_even)
+{
+ uint8_t a,b;
+ cli();
+
+ // Pre-equalization pulses
+ b = odd_even ? 6 : 5;
+ for(a=0; a<b ; a++) // 6x short sync
+ {
+ ZERO;
+ _delay_us(2);
+
+ BLACK;
+ _delay_us(30);
+
+ }
+
+ // VSYNC
+ for(a=0; a<5 ; a++) // 5x long sync
+ {
+
+ ZERO;
+ _delay_us(30);
+
+ BLACK;
+ _delay_us(2);
+
+ }
+
+ // Post-equalization pulses
+ b = odd_even ? 5 : 4;
+ for(a=0; a<b ; a++) // 5x short sync
+ {
+ ZERO;
+ _delay_us(2);
+
+ BLACK;
+ _delay_us(30);
+
+ }
+ line = odd_even ? 5 : 317;
+ renderLine = 0;
+
+ sei();
+}
+
+ISR (TIMER0_COMPA_vect)
+{
+ if(line == 310) vsync(0);
+ else if(line == 622) vsync(1);
+ else
+ {
+ hsync();
+ int t_line = line;
+ t_line = ( line > 312 ) ? line - 312 : line;
+
+ if ( t_line > 118 && t_line < 118 + (2*testimg_height) )
+ {
+ _delay_us(12);
+ asm_render_line();
+
+ if( !stretch )
+ {
+ stretch = 1;
+ renderLine += hres;
+ if ( renderLine > ((testimg_height*hres)-1) ) renderLine = 0;
+ } else stretch--;
+ }
+ }
+ return;
+}
+
+int main(void)
+{
+ rasterline = 0;
+ line = 0;
+
+ hres = testimg_width / 8;
+
+ DDRB =0b111;
+
+ TCCR0A |= (1<<WGM01)|(0<<WGM00);
+ TCCR0B |= (0<<WGM02)|(0<<CS02)|(1<<CS01)|(0<<CS00);
+ TIMSK |= (1<<OCIE0A);
+ OCR0A = 159;
+
+ sei();
+
+ // Here, we continue to do nothing...
+ while(1);
+}
git.defcon.no / avrfbosd / blobdiff