From: Jon Langseth <jon.langseth@lilug.no>
Date: Sun, 22 Jul 2012 11:51:12 +0000 (+0200)
Subject: Timer-code. This works fine with my video-grabber. My LCD struggles, but that may...
X-Git-Url: https://git.defcon.no/?a=commitdiff_plain;h=a94a046ca269a05672cb8b825f24056ce2e39397;p=avrfbosd
Timer-code. This works fine with my video-grabber. My LCD struggles, but that may be hardware, not software.
---
diff --git a/syncgen/main.c b/syncgen/main.c
index 8ad9cb3..e67d582 100644
--- a/syncgen/main.c
+++ b/syncgen/main.c
@@ -5,17 +5,17 @@
#define ZERO PORTB &= 0xFC
#define BLACK PORTB |= 0x01
-// -----..----- ^
-// | | |
-// -| RST VCC |-`
-// | |
-// .--| X1 PB2 |-
-// [ ] | | 470R
-// '--| X2 PB1 |--^v^v-.
-// | | |----> VidOut
-// .--| GND PB0 |--^v^v-'
-// | | | 1kR
-//----- ------------
+// -----..----- ^
+// | ___ | |
+// Com RST -| RST VCC |-`
+// | |
+// MegaClk -| CLKI ADC1 |---< VidDetect
+// | | 470R
+// VSwithc -| PB4 PB1 |--^v^v-.
+// | | |----> VidOut
+// .--| GND PB0 |--^v^v-'
+// | | | 1kR
+// --- ------------
#include "avrosdlogo.h"
@@ -82,7 +82,7 @@ void asm_render_line( void ) {
void hsync(void)
{
- line++;
+ line++; // Bumping the line-counter as part of hsync gives just the right front-porch ;D
ZERO; _delay_us(4); // sync
BLACK; _delay_us(8); // Back porch
}
@@ -94,38 +94,31 @@ void vsync(uint8_t odd_even)
// Pre-equalization pulses
b = odd_even ? 6 : 5;
- for(a=0; a<b ; a++) // 6x short sync
+ for(a=0; a<b ; a++) // short sync
{
ZERO;
_delay_us(2);
-
BLACK;
_delay_us(30);
-
}
// VSYNC
- for(a=0; a<5 ; a++) // 5x long sync
+ for(a=0; a<5 ; a++) // long sync
{
-
ZERO;
_delay_us(30);
-
BLACK;
_delay_us(2);
-
}
// Post-equalization pulses
b = odd_even ? 5 : 4;
- for(a=0; a<b ; a++) // 5x short sync
+ for(a=0; a<b ; a++) // short sync
{
ZERO;
_delay_us(2);
-
BLACK;
_delay_us(30);
-
}
line = odd_even ? 5 : 317;
renderLine = 0;
@@ -135,23 +128,27 @@ void vsync(uint8_t odd_even)
ISR (TIMER0_COMPA_vect)
{
- if(line == 310) vsync(0);
- else if(line == 622) vsync(1);
- else
+ if(line == 310) vsync(0); // End of ODD fields, start vsync'ing
+ else if(line == 622) vsync(1); // End of EVEN, start vsync'ing
+ else // In frame. Generate a hsync pulse, then do some drawing :)
{
hsync();
- int t_line = line;
+
+ int t_line = line; // Reducing line-count complexity by half ;)
t_line = ( line > 312 ) ? line - 312 : line;
+ // Draw the logo-image centered vertically
if ( t_line > 118 && t_line < 118 + (2*testimg_height) )
{
_delay_us(12);
asm_render_line();
+ // Stretch the image vertically by repeating the same line twice
if( !stretch )
{
stretch = 1;
renderLine += hres;
+ // Make sure we don't draw anything from RAM after the end of the image
if ( renderLine > ((testimg_height*hres)-1) ) renderLine = 0;
} else stretch--;
}
@@ -159,13 +156,17 @@ ISR (TIMER0_COMPA_vect)
return;
}
-/*
-ISR (INT0_vect)
+ISR (TIMER1_OVF_vect)
{
- //PORTB ^= 0x10;
+ // If this interrupt-vector is run, Timer1 has overflowed, and that means
+ // we have not seen any signal of significant level for quite a while.
+ // This means Sync-generation is needed...
+
+ // Make sure sync-gen is running...
+ TIMSK |= (1<<OCIE0A); // Enable compare-mach-a interrupt for Timer0
+ // Open up the switch blocking attiny-generated video:
PORTB |= 0x10;
}
-*/
int main(void)
{
@@ -192,6 +193,10 @@ int main(void)
ADCSRA |= (1 << ADPS2)|(1 << ADPS1)|(0<<ADPS0); // set prescaler to 64
DIDR0 |= (1<<ADC1D); // Disable logic input for PB2
+ TCCR1 |= (1<<CS13)|(0<<CS12)|(0<<CS11)|(1<<CS10); // Prescale Timer1 to CK/256
+ // CK/32 @ 20MHz gives 0.05us*256*256 = 3276.8us per Overflow, or 51 lines.
+ TIMSK |= (1<<TOIE1); // Enable Timer Overflow interrupts for Timer1
+
sei(); // We are ready to fire interrupts.
// Here, we continue to do nothing...
@@ -204,23 +209,18 @@ int main(void)
// greater than some minimal value on ADC1/PB2.
// This approach requires a weak pulldown on the relevant
// video input to the circuit, but it beats not detecting anything.
- if (ADCH > 10)
+ // 255/50*4=20, thus 0.4V
+ if (ADCH > 20)
{
- // Dummy code.
- // This needs to be replaced with something that triggers a timer ...
- /// Simply indicate on PB4 that we are seeing somethin.
- PORTB |= 0x10;
+ // Make sure any signal generated by us does not leak back
+ PORTB &= 0xEF; // Switch OFF VOut-switch for ATtiny
// The next statement stops sync-generation, thus also image-generation..
TIMSK &= ~(1<<OCIE0A); // Enable compare-mach-a interrupt
+ // Reset Timer1 so we don't generate a TOVF..
+ TCNT1 = 0;
}
- else
- {
- // Dummy code. Simply indicate on PB4 that we are below the threshold.
- PORTB &= 0xEF;
-
- // Make sure sync-gen is running...
- TIMSK |= (1<<OCIE0A); // Enable compare-mach-a interrupt
- }
+ // If we did not see a signal above the treshold, TCNT1 will continue
+ // to count up, until a TOV1 interrupt is generated.
}
};
}