From: Jon Langseth Date: Sun, 22 Jul 2012 11:51:12 +0000 (+0200) Subject: Timer-code. This works fine with my video-grabber. My LCD struggles, but that may... X-Git-Url: https://git.defcon.no/?a=commitdiff_plain;h=a94a046ca269a05672cb8b825f24056ce2e39397;p=avrfbosd Timer-code. This works fine with my video-grabber. My LCD struggles, but that may be hardware, not software. --- diff --git a/syncgen/main.c b/syncgen/main.c index 8ad9cb3..e67d582 100644 --- a/syncgen/main.c +++ b/syncgen/main.c @@ -5,17 +5,17 @@ #define ZERO PORTB &= 0xFC #define BLACK PORTB |= 0x01 -// -----..----- ^ -// | | | -// -| RST VCC |-` -// | | -// .--| X1 PB2 |- -// [ ] | | 470R -// '--| X2 PB1 |--^v^v-. -// | | |----> VidOut -// .--| GND PB0 |--^v^v-' -// | | | 1kR -//----- ------------ +// -----..----- ^ +// | ___ | | +// Com RST -| RST VCC |-` +// | | +// MegaClk -| CLKI ADC1 |---< VidDetect +// | | 470R +// VSwithc -| PB4 PB1 |--^v^v-. +// | | |----> VidOut +// .--| GND PB0 |--^v^v-' +// | | | 1kR +// --- ------------ #include "avrosdlogo.h" @@ -82,7 +82,7 @@ void asm_render_line( void ) { void hsync(void) { - line++; + line++; // Bumping the line-counter as part of hsync gives just the right front-porch ;D ZERO; _delay_us(4); // sync BLACK; _delay_us(8); // Back porch } @@ -94,38 +94,31 @@ void vsync(uint8_t odd_even) // Pre-equalization pulses b = odd_even ? 6 : 5; - for(a=0; a 312 ) ? line - 312 : line; + // Draw the logo-image centered vertically if ( t_line > 118 && t_line < 118 + (2*testimg_height) ) { _delay_us(12); asm_render_line(); + // Stretch the image vertically by repeating the same line twice if( !stretch ) { stretch = 1; renderLine += hres; + // Make sure we don't draw anything from RAM after the end of the image if ( renderLine > ((testimg_height*hres)-1) ) renderLine = 0; } else stretch--; } @@ -159,13 +156,17 @@ ISR (TIMER0_COMPA_vect) return; } -/* -ISR (INT0_vect) +ISR (TIMER1_OVF_vect) { - //PORTB ^= 0x10; + // If this interrupt-vector is run, Timer1 has overflowed, and that means + // we have not seen any signal of significant level for quite a while. + // This means Sync-generation is needed... + + // Make sure sync-gen is running... + TIMSK |= (1< 10) + // 255/50*4=20, thus 0.4V + if (ADCH > 20) { - // Dummy code. - // This needs to be replaced with something that triggers a timer ... - /// Simply indicate on PB4 that we are seeing somethin. - PORTB |= 0x10; + // Make sure any signal generated by us does not leak back + PORTB &= 0xEF; // Switch OFF VOut-switch for ATtiny // The next statement stops sync-generation, thus also image-generation.. TIMSK &= ~(1<