From 59abb8c1a25fa444e1884450517e88f3c016e765 Mon Sep 17 00:00:00 2001
From: Jon Langseth <jon.langseth@lilug.no>
Date: Sun, 22 Jul 2012 02:30:23 +0200
Subject: [PATCH] Starting to get somewhere on the video-sync-detect

---
 syncgen/main.c | 65 +++++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 56 insertions(+), 9 deletions(-)

diff --git a/syncgen/main.c b/syncgen/main.c
index 564ec67..8ad9cb3 100644
--- a/syncgen/main.c
+++ b/syncgen/main.c
@@ -1,8 +1,9 @@
 #include <avr/io.h>
 #include <avr/interrupt.h>
 #include <util/delay.h>
-#define ZERO  PORTB=0b000
-#define BLACK PORTB=0b001
+
+#define ZERO  PORTB &= 0xFC
+#define BLACK PORTB |= 0x01
 
 //       -----..-----   ^
 //      |            |  |
@@ -158,6 +159,14 @@ ISR (TIMER0_COMPA_vect)
 	return;
 }
 
+/*
+ISR (INT0_vect) 
+{
+	//PORTB ^= 0x10;
+	PORTB |= 0x10;
+}
+*/
+
 int main(void)
 {  
 	rasterline = 0;
@@ -165,15 +174,53 @@ int main(void)
 
 	hres = testimg_width / 8;
 
-	DDRB =0b111;  
+	DDRB |= (1<<PB0); // Black/zero level pin/resistor
+	DDRB |= (1<<PB1); // Color-pin, adds to black level ;)
+	DDRB |= (1<<PB4); // Control of video-switching. Fuse-bits changes this pin from XTAL2 to PB4
 
-	TCCR0A |= (1<<WGM01)|(0<<WGM00);
-	TCCR0B |= (0<<WGM02)|(0<<CS02)|(1<<CS01)|(0<<CS00);
-	TIMSK |= (1<<OCIE0A);
-	OCR0A = 159;
+	// Timer0 is used to generate hsync (and vsync)
+	TCCR0A |= (1<<WGM01)|(0<<WGM00); // Set Clear on compare match
+	TCCR0B |= (0<<WGM02);            // using WGM bits ...
+	TCCR0B |= (0<<CS02)|(1<<CS01)|(0<<CS00); // Set prescaler to CLK/8
+	TIMSK |= (1<<OCIE0A); // Enable compare-mach-a interrupt
+	OCR0A = 159; // 160 "ticks" on 20MHz/8 => 64us. Trigger one early..
 
-	sei();
+	// Video detection is done using ADC1 on PB2...
+	ADMUX |= (1<<ADLAR);   // Left-shifted result.
+	ADMUX |= (1<<MUX0);    // Select ADC for PB2
+	ADCSRA |= (1 << ADEN); // Enable ADC 
+	ADCSRA |= (1 << ADPS2)|(1 << ADPS1)|(0<<ADPS0); // set prescaler to 64
+	DIDR0 |= (1<<ADC1D);   // Disable logic input for PB2
+
+	sei(); // We are ready to fire interrupts.
 
 	// Here, we continue to do nothing...
-	while(1);
+	while(1)
+	{
+		ADCSRA |= (1 << ADSC); // start ADC measurement
+		while (ADCSRA & (1 << ADSC) ); // wait till conversion complete 
+		{
+			// We are detecting "video" if we have a value
+			// greater than some minimal value on ADC1/PB2.
+			// This approach requires a weak pulldown on the relevant
+			// video input to the circuit, but it beats not detecting anything.
+			if (ADCH > 10)
+			{
+				// Dummy code. 
+				// This needs to be replaced with something that triggers a timer ...
+				/// Simply indicate on PB4 that we are seeing somethin.
+				PORTB |= 0x10;
+				// The next statement stops sync-generation, thus also image-generation..
+				TIMSK &= ~(1<<OCIE0A); // Enable compare-mach-a interrupt
+			}
+			else
+			{
+				// Dummy code. Simply indicate on PB4 that we are below the threshold.
+				PORTB &= 0xEF;
+
+				// Make sure sync-gen is running...
+				TIMSK |= (1<<OCIE0A); // Enable compare-mach-a interrupt
+			}
+		}
+	};
 }
-- 
2.39.2